03-04-2018, 08:20 PM | #21 |
Join Date: Oct 2014
Location: Cleveland
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Re: Ternary Computers
Whether it is 2-state bits or 3-state trits, they are both universal Turing machines. 5 bits can represent 32 states, 3 trits can represent 27 states. At any higher level, all you care about is the number of possible states.
Now, an analog-ish tri, where you have 0, 1, and various voltages between 0 and 1, could have some interesting tricks (better at calculating probabilities for instance), but in the end all you are changing is efficiency of various calcs, not creating any magic new features. (Your analog computer can have 1000 analog voltages between 0 and 1? I can get that same range on a binary computer by using 10 bits to store the voltage.) For a direct analogy, do some reading on RF modulation. That is all about going from a carrier with a 1 or 0 (morse), to carrier with the actual values on it (AM and FM), to fancy tricks to get more data bits into the same frequency range (QAM) etc etc. |
03-05-2018, 01:34 AM | #22 |
Join Date: Dec 2006
Location: Meifumado
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Re: Ternary Computers
In defence of the OP, the Wikipedia article and this article, among others, are optimistic about the benefits of ternary computing. I'm not sure what gaming effects would be achieved though if you accept the hype- reduced size and weight? Unhackability? +1 Complexity? Perhaps it's the justification for AI in a setting.
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03-05-2018, 05:46 AM | #23 | |
Join Date: Jun 2005
Location: Lawrence, KS
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Re: Ternary Computers
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03-05-2018, 07:37 AM | #24 | ||
Join Date: Dec 2006
Location: Meifumado
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Re: Ternary Computers
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03-05-2018, 07:49 AM | #25 |
Join Date: Sep 2007
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Re: Ternary Computers
I'm not sure the functional hardware (in addition to storage) for ternary would be simpler, even if the register storage were more dense. One reference I saw was extolling the especial virtues of "balanced ternary", where you imagine the three values as -1, 0, and 1, because this made math so easy. To do subtraction, you change all the 1s into -1s and just do addition, so you don't also need subtraction hardware.
But that claim seems blissfully ignorant of the nearly universal use of "two's complement" representation of negative numbers in modern binary computers. Not only is it a neat mathematical trick, it means that addition and subtraction are exactly the same process, using exactly the same hardware. There's no need for that additional inversion step, which in hardware terms would be another pipeline stage and another set of gate delays, or else twice as many clocks if you need to save die area rather than speed and cycle the number around twice through the ALU. The binary ALUs don't know or care whether you think FF is 255 or -1. You get the same answer either way. There's certainly a checkered history of representation of negative numbers in binary computers, with ones complement or signed-magnitude formats (and awkwardness with +0 and -0 being different numbers). But that's why two's complement became so popular. Maybe this claim is just being repeated from the early days of computing when ternary seemed more attractive, and other binary representations were still in use. You could, of course, use a radix complement representation in any base. But it's harder to create the three's complement (or nine's complement) of an integer than the two's complement. Maybe there's another cool trick to use with ternary as well. But the pitch of being able to "easily" negate a number isn't actually a selling point. It's even easier invert all the bits in a binary number -- no table lookup or bit-by-bit subtraction hardware -- and your adder has to have a carry input anyway. I can't think of a good use off the top of my head for being able to negate individual bits of a single ternary number, flipping only some of them but not all. But that will probably be related less to arithmetic than the uses binary computers have for exclusive OR, like drawing and erasing cursors on screen, exchanging two memory locations without needing intermediate storage, or just setting individual bits in a register. For storage, the density might be nice if the memory cells and access hardware did in fact work out to be smaller per bit, while maintaining stability and reliability. (I can't help but think there's a reason that the DRAM manufacturers aren't doing so already...) But then, if you're going to convert to binary in the processing logic, then you'd be better off with quarternary or octal or hexadecimal cells, the easier to convert to binary on the data bus to and from your CPU. Ternary's not a power of two, so it would make for awkward interchanges compared to just splitting the bits out into a binary latch or gathering up those bits. Last edited by Anaraxes; 03-05-2018 at 09:00 AM. |
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